What settings would result in the sum of the registers R0 and R3 being stored in memory location 4?
What settings would cause the contents of memory address 4 to be copied into register R0?
Assuming that data can be copied to and from main memory in a single CPU cycle, how many cycles are required to
add the contents of memory addresses 5 and 6 and then store the result in memory address 7? Describe the settings for each cylce.
What do you think would happen if you forgot to place a HALT instruction at the end of a machine language program?
How would the control unit react? Use the simulator to test your prediction, then report the results.
What task is performed if the following is stored in memory and executed?
LOAD R0 5
LOAD R1 6
SUB R2 R0 R1
STORE 7 R2
HALT
10
4
0